Saturday, December 11, 2010
8086 Microprocessor Instruction Set
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B-Tech,
Computers,
Electronics,
JNTU
This is the Instruction set of Intel- 8086 Microprocessor.
Here, the instructions are classified and grouped into categories to make it easy to understand and to remember.
DATA TRANSFER INSTRUCTIONS
GENERAL – PURPOSE BYTE OR WORD TRANSFER INSTRUCTIONS:
MOV (Move )
PUSH (Push data onto stack )
POP (Pop data from stack )
XCHG (Exchange data )
XLAT (Table look-up translation )
SIMPLE INPUT AND OUTPUT PORT TRANSFER INSTRUCTIONS:
IN (Input from port )
OUT (Output to port )
SPECIAL ADDRESS TRANSFER INSTRUCTIONS
LEA (Load Effective Address )
LDS (Load pointer using DS )
LES (Load ES with pointer )
FLAG TRANSFER INSTRUCTIONS:
LAHF (Load flags into AH register )
SAHF (Store AH into flags )
PUSHF (Push flags onto stack )
POPF (Pop data into flags register )
ADITION INSTRUCTIONS:
ADD (Add)
ADC (Add with carry )
INC (Increment by 1 )
AAA (ASCII adjust AL after addition )
DAA (Decimal adjust AL after addition )
SUBTSUBTRACTION INSTRUCTIONS:
SUB (Subtraction )
SBB (Subtraction with borrow )
DEC (Decrement by 1 )
NEG (Two's complement negation )
CMP (Compare operands )
AAS (ASCII adjust AL after subtraction )
DAS (Decimal adjust AL after subtraction )
MULTIPLICATION INSTRUCTIONS:
MUL (Unsigned multiply )
IMUL (Signed multiply )
AAM (ASCII adjust AX after multiplication )
DIVISION INSTRUCTIONS:
DIV (Unsigned divide )
IDIV (Signed divide )
AAD (ASCII adjust AX before division )
CBW (Convert byte to word )
CWD (Convert word to doubleword )
BIT MANIPULATION INSTRUCTIONS
LOGICAL INSTRUCTIONS:
NOT (Negate the operand, logical NOT)
AND (Logical AND)
OR (Logical OR)
XOR (Excludive BR)
TEST (Logical compare (AND))
SHIFT INSTRUCTIONS:
SHL (Shift Left (unsigned shift left))
SHR (Shift right (unsigned shift right))
SAR (Shift Arithmetically right (signed shift right))
PROGRAM EXECUTION TRANSFER INSTRUCTIONS
UNCONDITIONAL TRANSFER INSTRUCTIONS:
CALL (Call procedure )
RET (Return from procedure)
JMP (Jump)
CONDITIONAL TRANSFER INSTRUCTIONS (Jump if condition (Jxx)):
JA / JNBE
JAE / JNB
JB / JNAE
JBE / JNA
JC
JE / JZ
JG / JNLE
JGE / JNL
JL / JNGE
JLE / JNG
rof. Krishna JNC
JNE / JNZ
JNO
JNP / JPO
JNS
JO
JP / JPE
JS
ITERATION CONTROL INSTRUCTIONS:
LOOP (Loop control)
LOOPE / LOOPZ
LOOPNE / LOOPNZ
JCXZ/ JECXZ (Jump if register (E)CX is zero)
INTERRUPT INSTRUCTIONS:
INT (Call to interrupt)
INTO (Call to interrupt if overflow)
IRET (Return from interrupt)
PROCESS CONTROL INSTRUCTIONS
FLAG SET / CLEAR INSTRUCTIONS:
STC (Set carry flag )
CLC (Clear carry flag)
CMC (Complement carry flag)
STD (Set direction flag)
CLD (Clear direction flag)
STI (Set interrupt flag)
CLI (Clear interrupt flag)
EXTERNAL HARDWARE SYNCHRONIZATION INSTRUCTIONS:
HLT (halt CPU)
WAIT (Wait until not busy)
ESC (Escape)
LOCK (Lock Bus)
NOP (No operation)
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ReplyDeletethanks to give me a very true information about the 8086 instructions.
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